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TTTC’s E.J. McCluskey
Best Doctoral Thesis Award

CALL FOR SUBMISSIONS
Scope -- Contest 2010 -- Submissions -- Additional Information -- Past Recipients

Scope

Since 2005, the TTTC Best Doctoral Thesis Award in test technology has been presented annually to the winner of a contest, which took place at the IEEE VLSI Test Symposium. The Award serves the purpose to promote most impactful doctoral student work, to provide the students with the exposure to the community and the prospective employers, and to support interaction between academia and industry in the field of test technology.In order to increase the worldwide participation of doctoral students, starting 2010, the contest will be expanded to a two-stage process. Semi-finals will be held at TTTC-sponsored conferences, symposia or workshops. The winners of the semi-finals, determined by jurys composed of industrial experts, will compete against each other in the finals, held at a major TTTC-sponsored conference or symposium. This major Award has recentlybeen named after Prof. Edward J. McCluskey, a key educator and mentor in the fields of test technology, logic design, and reliability.

Contest 2010

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In 2010, three semi-finals will be held. The first will be held at the IEEE VLSI Test Symposium (VTS’10), the second at the IEEE European Test Symposium (ETS’10), and the third at the IEEE Latin American Test Workshop (LATW’10). The finals will be held at the International Test Conference (ITC).

Submission Instructions

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Doctoral students who have graduated in 2009 or 2010 or are expected to graduate in 2010 are invited to submit a one page abstract of their thesis, including the names of the student and the advisor and the start/end dates of the thesis. A second page is allowed for references and/or figures only. An individual can only participate in the contest once in a lifetime. Prospective participants are encouraged to participate when they are close to thesis completion and have obtained sufficient results. Submissions to multiple regional sites are prohibited. Submission links and deadlines are given above.

Since the purpose of this contest is for the student to gain exposure and feedback from the industry, the abstract should clearly address the following: i) define the problem and its relevance to industry, ii) describe existing industrial practices for solving the problem, and iii) explain the proposed methodology (and any pertinent case study) and how it advances the theory and/or practice in the particular field.

Based on the submitted abstracts, a set of semi-finalists will be selected for the semi-finals of the contest. This round includes a short (seven-minute) slot for oral presentation during a dedicated session at the semi-final event. The jury will judge the presentations, and the winner of the semi-final will be announced during the event. The finalists will present their work in a 30-minute presentation at ITC’10, and the winner will be determined by a panel of industrial experts. The Award is given to the winning student and the advisor of the thesis and includes an invitation to submit a paper on the presented work to the IEEE Design & Test of Computers.

Additional Information
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This award is organized by the TTTC Students Activities Committee.

For more information, please contact Ilia Polian at: TTTC Student Activities Group

Past Recipients
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2009 (held at IEEE VLSI Test Symposium)

First place winner: Mahmut Yilmaz, Duke University
Thesis topic: "Automated Test Grading And Pattern Selection for Small-Delay Defects"

Second place winner: Erkan Acar, Duke University
Thesis topic: "Architectural and Defect-Based Test and Diagnosis Techniques for RF Integrated Circuits"

Third place winner: Bo Yang, Polytechnic Institute of NYU
Thesis topic: "Design-for-Test Techniques for Securing Scan-based Designs"

2008 (held at IEEE VLSI Test Symposium)

First place winner: Devanathan Varadarajan, Indian Institute of Technology, Madras, India
Thesis topic: "On Power-safe Testing of System-on-Chips"

Second place winner: Sudarshan Bahukudumbi, Duke University, USA
Thesis topic: "Wafer-Level Testing and Test Planning for Integrated Circuits"

Third place winner: Francois-Fabien Ferhani, Stanford University, USA
Thesis topic: "Comparing Partial and Complete Test Sets and Test Metrics"

2007 (held at IEEE VLSI Test Symposium)

First place winner: Nisar Ahmed, University of Connecticut, USA
Thesis topic: "High Quality Delay Tests for Very Deep Submicron Designs"

Second place winner: Nikola Bombieri, University of Verona, Italy
Thesis topic: "A TLM Design for Verification Methodology"

Third place winner: Ahcene Bounceur, TIMA Laboratory, Grenoble, France
Thesis topic: "CAT Platform for Mixed-Signal Circuit Testing"

2006 (held at IEEE VLSI Test Symposium)

First place winner: Federico di Palma, University of Pavia, Italy
Thesis topic: "End-of-line Algorithms for Process Diagnosis in Semiconductor Manufacturing"

Second place winner: Achraf Dhayni, TIMA Laboratory, Grenoble, France
Thesis topic: "Pseudorandom Built-In Self-Test for MEMS"

Third place winner: Paolo Bernardi, Politecnico di Torino, Italy
Thesis topic: "Test Techniques for Systems on a Chip"

2005 (held at IEEE VLSI Test Symposium)

First place winner: Alberto Valdes-Garcia
Thesis topic: "Development and Implementation of Built-In Testing Techniques for Analog and RF Integrated Circuits"

Second place winner: Anand Gopalan
Thesis topic: "Built-In-Self-Test of RF Front-end Circuitry"

Third place co-winner: Swarup Bhunia
Thesis topic: "Novel Low-Overhead Design-For-Testability Techniques for Improving Testability in Nano-Scaled Circuits"

Third place co-winner: Haralampos Stratigopoulos
Thesis topic: "Neural Classification of Analog Circuits"

For more information, email Ilia Polian at: TTTC Student Activities Group

The Doctoral Thesis Award 2010 is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council Student Activities Group (TTTC).


IEEE Computer Society- Test Technology Technical Council

TTTC CHAIR
Adit D. SINGH
Auburn University - USA
Tel. +1-334-844-1847
E-mail adsingh@eng.auburn.edu

PAST CHAIR
André IVANOV
University of British Columbia - Canada
Tel. +1-604-822-6936
E-mail ivanov@ece.ubc.ca

TTTC 1ST VICE CHAIR
Michael NICOLAIDIS
TIMA Laboratory - France
Tel. +33-4-765-74696
E-mail michael.nicolaidis@imag.fr

SECRETARY
Christian LANDRAULT
LIRMM - France
Tel. +33-4-674-18524
E-mail landrault@lirmm.fr

ITC GENERAL CHAIR
Gordon W. ROBERTS
McGill University
- Canada
Tel. +1-514-398-6029
E-mail gordon.roberts@mcgill.ca

TEST WEEK COORDINATOR
Yervant ZORIAN
Virage Logic Corporation - USA
Tel. +1-510-360-8035
E-mail yervant.zorian@viragelogic.com

TUTORIALS AND EDUCATION
Dimitris GIZOPOULOS

University of Piraeus
- Greece
Tel. +30-210-414-2372
E-mail dgizop@unipi.gr

STANDARDS
Rohit KAPUR

Synopsys
, Inc. - USA
Tel. +1-650-934-1487
E-mail rkapur@synopsys.com

EUROPE
Zebo PENG
Linköping University - Sweden
Tel. +46-13-282-067/-281-000
E-mail zpe@ida.liu.se

MIDDLE EAST & AFRICA
Ibrahim HAJJ
American University of Beirut - Lebanon
Tel. +961-1-341-952
E-mail ihajj@aub.edu.lb

STANDING COMMITTEES
André IVANOV
University of British Columbia - Canada
Tel. +1-604-822-6936
E-mail ivanov@ece.ubc.ca

ELECTRONIC MEDIA
Alfredo BENSO
Politecnico di Torino - Italy
Tel. +39-011-564-7080
E-mail alfredo.benso@polito.it

 

PRESIDENT OF BOARD
Yervant ZORIAN
Virage Logic Corporation- USA
Tel. +1-510-360-8035
E-mail yervant.zorian@viragelogic.com

SENIOR PAST CHAIR
Paolo PRINETTO
Politecnico di Torino - Italy
Tel. +39-011-564-7007
E-mail Paolo.Prinetto@polito.it

TTTC 2ND VICE CHAIR
Chen-Huan CHIANG

Alcatel-Lucent
- USA
Tel. +1-973-386-6759
E-mail chenhuan@alcatel-lucent.com

FINANCE
Michael NICOLAIDIS
TIMA Laboratory - France
Tel. +33-4-765-74696
E-mail michael.nicolaidis@imag.fr

IEEE DESIGN & TEST EIC
K.T. (Tim) CHENG
University of California, Santa Barbara - USA
Tel. +1-805-893-72942
E-mail timcheng@ece.ucsb.edu

TECHNICAL MEETINGS
Chen-Huan CHIANG
Alcatel-Lucent
- USA
Tel. +1-973-386-6759
E-mail chenhuan@alcatel-lucent.com

TECHNICAL ACTIVITIES
Matteo SONZA REORDA
Politecnico di Torino - Italy
Tel.+39-011-564-7055
E-mail matteo.sonzareorda@polito.it

ASIA & PACIFIC
Kazumi HATAYAMA
STARC - Japan
Tel. +
E-mail hatayama.kazumi@starc.or.jp

LATIN AMERICA
Victor Hugo CHAMPAC
Instituto Nacional de Astrofisica - Mexico
Tel.+52-22-470-517
E-mail champac@inaoep.mx

NORTH AMERICA
William R. MANN
SW Test Workshop - USA
Tel. +1-949-645-3294
E-mail william.mann@ieee.org

COMMUNICATIONS
Cecilia METRA
Università di Bologna - Italy
Tel. +39-051-209-3038
E-mail cmetra@deis.unibo.it

INDUSTRY ADVISORY BOARD
Yervant ZORIAN
Virage Logic Corporation- USA
Tel. +1-510-360-8035
E-mail yervant.zorian@viragelogic.com


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